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  30409 ms / 82799rm(ki) no.6193-1/7 http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 LB1945H overview the LB1945H is a pwm current cont rol type stepping motor driver. feature ? pwm current control (external excitation) ? load current digital selection (1-2, w1-2, and 2 phase excitation drives possible) ? built-in upper/lower diode ? simultaneous on prevention function (feed-through current prevention) ? built-in thermal shutdown circuit ? built-in noise canceler specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum motor supply voltage v bb max 30 v output peak current i o peak t w 20 s 1.0 a output continuous current i o max 0.8 a logic supply voltage v cc max 6.0 v logic input voltage range v in max -0.3 to v cc v emitter output voltage v e max 1.0 v allowable power dissipation pd max mounted on a specified board * 1.9 w operating temperature topr -20 to +90 c storage temperature tstg -55 to +150 c * specified board: 114.3mm 76.1mm 1.6mm, glass epoxy board. monolithic digital ic pwm current control type stepping motor driver orderin g numbe r : en6193b stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LB1945H no.6193-2/7 allowable operating ranges at ta = 25 c parameter symbol conditions ratings unit motor supply voltage v bb 10 to 28 v logic supply voltage v cc 4.75 to 5.25 v reference voltage v ref 1.5 to 5.0 v electrical characteristics at ta = 25 c, v bb = 24v, v cc = 5v, v ref = 5.0v ratings parameter symbol conditions min typ max unit output block i bb on i 1 = 0.8v, i 2 = 0.8v, enable = 0.8v 0.5 1.0 2.0 ma output stage supply current i bb off enable = 3.2v 0.2 ma v o sat1 i o = +0.5a, sink 0.3 0.5 v v o sat2 i o = +0.8a, sink 0.5 0.7 v v o sat3 i o = -0.5a, source 1.6 1.8 v output saturation voltage v o sat4 i o = -0.8a, source 1.8 2.0 v i o 1(leak) v o = v bb , sink 50 a output leakage current i o 2(leak) v o = 0v, source -50 a output sustain voltage v sus l = 3.9mh, i o = 1.0a, design guarantee value * 30 v logic block i cc on i 1 = 0.8v, i 2 = 0.8v, enable = 0.8v 50 70 92 ma logic supply current i cc off enable = 3.2v 7 10 13 ma v ih 3.2 v input voltage v il 0.8 v i ih v ih = 3.2v 35 50 65 a input current i il v il = 0.8v 7 10 13 a i 1 = 0.8v, i 2 = 0.8v 9.5 10 10.5 i 1 = 3.2v, i 2 = 0.8v 13.5 15 16.5 set current control threshold value vref/vsen i 1 = 0.8v, i 2 = 3.2v 25.5 30 34.5 reference current iref vref = 5.0v, i 1 = 0.8v, i 2 = 0.8v 17.5 25 32.5 a cr pin current i cr cr = 1.0v -1.0 ma thermal shutdown temperature t-tsd design guarantee value * 170 c temperature hysteresis width ts hys 40 c * design guarantee value, do not measurement.
LB1945H no.6193-3/7 package dimensions unit : mm (typ) 3233b pin assignment 24 23 22 21 15 16 17 18 19 20 1 out a 2 out a 3 nc 4 nc 5 e1 6 d-gnd 7 v bb 1 8 14 13 12 11 10 9 out b nc nc v bb 2 e2 d-gnd v cc phase1 enable1 i a 2 i a 1 v ref 1 gnd 28 27 26 25 cr phase2 enable2 i b 2 i b 1 v ref 2 s-gnd out b LB1945H sanyo : hsop28h(375mil) 15.2 (6.2) 0.3 7.9 (4.9) 10.5 2.7 0.8 2.0 (0.8) 1 14 15 28 0.65 0.25 2.45max 0.1 (2.25) heat spreader -20 0 20 40 60 80 100 0 2.4 1.6 1.2 0.8 0.4 pd max -- ta 2.0 1.9 0.91 90 ambient temperature, ta -- c allowable power dissipation, pd max -- w specified board: 114.3 76.1 1.6mm 3 glass epoxy board.
LB1945H no.6193-4/7 block diagram out a out a out b out b v bb 1 phase1 enable1 i a 1 i a 2 v ref 1 gnd phase2 enable2 i b 1 i b 2 v ref 2 v cc e1 e2 v bb 2 d-gnd d-gnd 9 10 12 11 13 14 s-gnd 5 6 22 23 15 16 18 17 19 20 8 24 27 28 7 2 1 osc cr 21 control logic ciruit control logic ciruit thermal shutdown circuit current select circuit current select circuit blanking time blanking time
LB1945H no.6193-5/7 truth table enable phase out a out a l h h l l l l h h ? off off i 1 i 2 output current l l vref / (10 re) = i out h l vref / (15 re) = i out 2/3 l h vref / (30 re) = i out 1/3 h h 0 note: output is off when enable = h or when i 1 = i 2 = h. pin function pin no. pin name function 7 v bb 1 output stage power supply voltage pin. 24 v bb 2 cathode pin for the upper-side diodes. 5 23 e1 e2 insert resistor re between these pins and ground to control set current. 2 1 27 28 out a out a out b out b output pins. 14 gnd ground pin. 15 s-gnd sense ground pin. 6 22 d-gnd d-gnd lower-side internal diode ground (anode). 21 cr triangular wave chopping with cr constant setting. triangular wave off time is noise cancel time. 13 16 v ref 1 v ref 2 output current setting pins. (output current is set by inputting a 1.5v to 7.5v voltage.) 9 20 phase1 phase2 output phase select input pin. high input: out a = h, out a = l low input: out a = l, out a = h 10 19 enable1 enable2 output on/off setting input pins. high input: output off low input: output on 12,11 17,18 i a 1,i a 2 i b 1,i b 2 output current setting digital input pins. current is set to 1/3, 2/3, 1 by high and low combinations. 8 v cc logic block power supply voltage pin.
LB1945H no.6193-6/7 application circuit example 24 23 22 21 15 16 17 18 19 20 1 2 out a 3 nc 4nc 5 e1 6 d-gnd 7v bb 1 8 14 13 12 11 10 9 out b nc nc v bb 2 e2 d-gnd v cc phase1 enable1 i a2 i a 1 v ref 1 gnd 28 27 26 25 cr phase2 enable2 i b 2 i b 1 v ref 2 s-gnd out b LB1945H out a 0.51 (1w) 24v 47 f 5v 10 f 0.1 f l 820pf 0.51 (1w) 82k l logic input logic input voltage from 1.5 to 5v can be applied. the fin on the bottom of hsop-28h package and the fins between pins 7 and 8 and 21 and 22 should be grounded.
LB1945H ps no.6193-7/7 usage notes 1. vref pin because the vref pin is used as refe rence voltage input pin for the current setting, care must be taken to prevent noise from affecting the input. 2. gnd pin because this ic switches large currents, the ground pattern must be designed w ith care. the fin on the bottom of the package and the fins between pins 7 and 8 and 21 and 22 should be grounded. low-impedance patterns should be used in blocks where large currents flow, and these blocks should be separated from low-level signal blocks. in particular, the ground of the sense resistor re at pin e should be located close to the ic ground. pattern layout should be designed so that the capacitors between v cc and ground and v bb and ground are close to v cc and v bb . on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.


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